Current Openings

1) FPGA Design Engineers – for World Leader’s New R & D Centre in Bangalore
  • Architect, design, verify and optimize FPGA based solution for high performance networking applications such as Ethernet , TCP/IP Offload, Packet Processing.
  • Strong expertise in RTL Design using Verilog / System Verilog.
  • Solid understanding of Ethernet Stack (L2/L3), VLAN, ARP, TCP/IP, UDP.
  • Experience with FPGA tools: Xilinx Vivado , Intel Quartus, Synplify Pro.
  • Familiarity with packet capture, Wireshark, and traffic generation tools.
  • Hands-on with FIFO/ BRAM/URAM, Dual port RAM, and multi-clock domain design.
  • BE/ME with 5 – 15yrs of experience.

2) Silicon Photonics IC Design Engineer – for a new Photonics Products Team in Bangalore
  • Responsible for the design, development, integration, tapeout of silicon photonics (SiPho) components and integrated circuits, and have the SiPho PIC integrated into cutting-edge optical engine products.
  • Solid foundation on optics, silicon photonics, and optical communications, including Silicon, SiN, waveguides, AWGs, directional couplers, Mach Zehnder interferometers, edge couplers, photo detectors, etc.
  • Hands-on experience in design of integrated silicon photonic components, including simulation, layout, data analysis, etc.
  • Expert level knowledge of tools such as Lumerical, Cadence design capture and simulation platforms.
  • Proficiency in generation/modification of customized pcells.
  • Deep understanding of optics, silicon photonics, and optical passive /active components.
  • Proficiency in optical component and circuit simulation.
  • PhD in Electrical Engineering, Photonics, or related discipline with 3+ years of experience, OR Master’s degree with 8+ years of relevant experience.

3) Director – ASIC Design for a new Data Centre ASIC Systems Team in Bangalore
  • Provide technical leadership with hands-on approach.
  • In-depth working knowledge of ASIC frontend design flow.
  • Experience in functional specification, uArch development & RTL Design of complex high speed designs in networking.
  • Experience in designing for Ethernet, PCIe based solution.
  • BE/ME with 15 – 20yrs of experience.

4) Phy Systems Expert IC Role – for World Leaders new R & D Centre in Bangalore
  • Minimum 10 years of hands-on experience in designing RF and Modem-based systems.
  • Previous experience in C/C++, Matlab and Python programming.
  • Strong background in DSP & Communications.
  • Familiarity with wireless communication protocols (e.g., WIFI, WIMAX, WIGIG).
  • Systems Engineering expertise in Modem Algorithms like Channel Estimation, Equalization, DPD, MU-MIMO, Beamforming Weight Estimation, Power Control.
  • Experience working with millimetre wave frequency bands (60GHz and above).

5) Sr Manager – ASIC Verification – for a new Data Centre ASIC Systems Team in Bangalore
  • Provide technical leadership in ASIC Verification with hands-on approach.
  • 12 – 16 years of experience in ASIC verification, particularly in networking ASIC design.
  • Strong understanding of ASIC design and verification flow.
  • Experience in using modern verification methodologies like System Verilog, UVM.
  • Experience with coverage, gate/timing/power simulations, and test-plan documentation.
  • Prior experience with Ethernet, UCIe, and PCIe protocols and both serial and parallel VIP verification modes, with strong expertise in high-speed SerDes.

6) Senior Verification Engineers – for World Leaders new R & D Centre in Bangalore
  • Responsible for the Verification of Various IPs and top level designs.
  • At least 10+ years’ experience with system Verilog UVM based verification.
  • Experience with Specman (Advantage).
  • Deep understanding of verification concepts and advanced methodologies.
  • Experience developing verification environments from scratch.
  • Background in Networking Ips, Ethernet Switching , SOC desired.
  • Experience with PCI-E, DDR4/5 memory controllers (Advantage).

7) ASIC Verification – Principal / Sr Staff / Staff Engineers- for a new Data Centre ASIC Systems Team in Bangalore
  • ME/BE in Electrical Engineering, Computer Engineering, or related field.
  • 8-15 years of experience in ASIC verification in the area of data center networking.
  • Technical Skills: Expertise in Hardware Verification and Hardware Verification Methodology (e.g., System Verilog, UVM) with a strong understanding of ASIC Design and Verification flow. Experience with coverage, gate/timing/power simulations & test-plan documentation is required.
  • Prior experience with Ethernet and PCIe Protocols and Serial and Parallel VIP verification modes. Strong prior experience with High speed Serdes.

8) Technical Director, ASIC Architecture – for World Leaders in Communication Space in Bangalore
  • Architect effective, versatile chips or subsystems in a chip as per business requirements.
  • Define/contribute to road map of chips.
  • Drive definition of architectural solutions at chip, subsystem level from requirement documents.
  • Strong fundamentals in programming, CPU architecture and SOC systems.
  • Specialization in Digital Signal Processing, Communication systems, or Networking systems.
  • BE / ME with 18+ years of experience in Architecture, Micro-architecture, Development Planning.
  • System level knowledge and experience not only chip design but also boards and systems where they get used.
  • Ability to estimate chip PPA aspects, anticipate architecture, implementation risks.
  • RTL design skills using Verilog, System Verilog or VHDL.
  • Subsystem and Chip level verification, validation and interop planning.
  • Strong knowledge of ASIC implementation flows, challenges and foresight.

9) RTL Engineer, Data Path – Principal / Sr Staff / Staff Engineers – for a new Data Centre ASIC Systems Team in Bangalore
  • BE/ME with a minimum of 8-15 years of experience.
  • Working knowledge of system Verilog, and Verilog is Mandatory. Prior experience with ownership of memory subsystems.
  • Proven expertise in designing and optimizing memory algorithms and QoS mechanisms, for high-speed networking devices.
  • Solid understanding of ASIC design methodologies, including simulation, and verification tools (e.g. Synopsys, Cadence).
  • Experience with Ethernet/PCIe networking protocols.

10) Communications Systems Engineering Manager – for World Leaders in Communication Space in Bangalore
  • Very good understanding of modern communications systems, both at a signal processing level as well as at system level.
  • Knowledge of MATLAB, Python and C/C++ is a must.
  • Knowledge in System-C and any High-level synthesis tool is a plus.
  • Strong academic background (Master’s or PhD in signal processing or related area).
  • 15+ years of work experience in at least one or many of the following areas:
    • Wireline or Wireless modulator/demodulator design.
    • Experience in Designing Multi-rate filter banks.
    • Experience in Designing Error control code and their associated decoding algorithms LDPC/Reed-Solomon/Trellis Coded Modulation.
    • Power amplifier Linearization techniques.
    • SERDES – Physical layer.
    • Beamforming/Interference cancellation techniques.
    • LOS MIMO.

11) RFIC Design – Sr Staff / Staff Engineers for World Leaders in Wireless Connectivity Products in Bangalore
  • BE / ME with 10+yrs of experience in Analog and RFIC circuit design.
  • Solid understanding of highly scaled CMOS process and device characteristics, and scaling-related impact to circuit design.
  • Experience in designing any of the following circuits.
  • LNA, Mixer, PA, VCO, PLL, Analog Baseband Filter, TIA.
  • Experience with Cadence IC design tools (SpectreRF, virtuoso schematic capture, layout, layout verification and parasitic extraction), EM Simulators (EMX, HFSS), MATLAB and Scripting (Shell, Python).
  • Experience using lab equipment such as Signal Generators, Spectrum Analyzers, Oscilloscopes, Multi-Meters (DMMs), etc.

12) Director – SW Engineering (SDK) – for Next Generation AI Accelerator Chipset team in Bangalore
  • Build, inspire, mentor and retain high-performing global software engineering team responsible for delivering breakthrough products
  • Architect, design, and maintain company’s neural SDK to integrate with the current neural compiler and hardware solutions.
  • MS/PhD in Computer Science with 15+ years of experience in Embedded Systems Design, SW architecture, SW/HW co-design
  • Hands-on experience on SDK development and ability to master new technologies and complex systems
  • Excellent presentation skills to C-level executives, Board, customers and technical audience
  • Knowledge of the fundamental AI/neural-networks concepts

13) Design Verification (Subsystem & / or SoC) – Principal / Sr Staff / Staff Engineer – for World’s First Wireless 5G AI/ ML Chipsets in Bangalore
  • Hands-on SoC verification environment development and integration expertise
  • Strong understanding and development experience with C based verification flows, and tests, which involves multiple processor cores
  • Must have strong knowledge on Bus protocols (AXI/AHB/APB)
  • Should be proficient in Verilog/ System – Verilog
  • Candidates with experience integrating Verification IPs (VIPs) for protocols such as DDR, PCIe, Ethernet, USB will be preferred
  • ARM / RISC V Architecture knowledge
  • Gate Level Simulation flow bring up and experience (GLS)

14) Network Software Datapath Engineer – for next generation Data-Centre Chipset team in Bangalore
  • BE /BTech in Computer Science or equivalent degree
  • Experience writing packet processing software for embedded systems
  • Experience with device drivers, low level I/O, virtualization
  • Experience writing software for PCIe interfaces
  • Good understanding of performance optimization including solid understanding of I-Cache/D-Cache access, I/O and memory accesses, various CPU architectures

15) Linux / Firmware – Staff Software Engineer – for World Leaders in Communication space in Bangalore
  • Design and implement software for SoCs; this includes developing low level firmware drivers, system boot code, RTOS abstraction layers, firmware features and host applications
  • Performance tuning and optimization of firmware stack to support new use-cases for SoCs
  • Excellent C/C++ programming skills
  • Experience of developing embedded firmware/software on top of an RTOS and/or Linux OS
  • In depth understanding of Operating Systems (Linux and/or RTOS)

16) CPU Architect – for RISC-V Architecture based New CPU Team in Bangalore
  • Ideal candidate should have strong understanding of computer architecture and pipelined designs with 12+ yrs of experience
  • Experience on the internals of processor (Instruction Fetch Design, Branch Prediction, Memory Subsystem or Load/store design, Cache Coherency, DMA, MMU, RISC-V ISA design etc).

17) ASIC Design – Director / Principal/ Sr. Staff / Staff / Sr Engineer – for World Leaders in CE Space in Bangalore / Noida
  • Experience in all aspects of RTL design flow from Specification/Micro-architecture definition to design and verification, Timing Analysis, DFT and Implementation.
  • 3 – 20 Years of experience in IP/SOC design with successful delivery of production quality chips
  • Should have a firm understanding and hands-on experience on Chip Assembly, RTL Design, IP Integration, RTL signoff tools and CDC/RDC.
  • Knowledge of microprocessors, bus protocols like AXI,ATB,APB preferred.
  • Strong domain knowledge of Clocking, System modes, Power management, debug, interconnect, safety, security and other architectures

18) Compiler – Director / Principal / Sr. Staff / Staff/ Sr Engineer – for next generation AI Accelerator Products Team in Bangalore

Controllers automate the management of elements in a network. Your responsibility will be to design and develop infrastructure to integrate various functions for provisioning and managing nodes in a data center.

Skills, Education, and Experience Required

  • Design and devise graph semantics, intermediate representations, and abstraction layers between high-level definitions (like TensorFlow and Pytorch) and low-level distributed code
  • Leverage open-source tools and compiler toolchains such as ISL, MLIR and LLVM to build domain specific language and compiler.
  • Develop and optimize the LLVM backend target for various generations of architecture
  • Compiler experience; experience in code generation and optimization for distributed systems
  • Strong proficiency in C/C++ or other language for designing large, performant systems

19) ASIC Design- Lead Engineer -for World’s First Wireless 5G AI/ ML Chipsets in Bangalore
  • Ability to Architect a sub-system or a group of sub-systems
  • Hands on experience in Modem design (Lower/ Upper Phy/ MAC), or Integrating Processor sub-systems and Coherent Mesh Networks, or Integrating High Speed Interfaces (DDR, PCIe, CXL, Ethernet, eCPRI, JESD, USB etc)
  • uArchitecture, RTL development strength – control path and datapath RTL development
  • Experience with RTL integration – ability to stitch together multiple blocks
  • Must have working knowledge of CHI/AXI/AHB/APB protocols

20) Embedded SW Engineer -for Next Generation Data-Centre Chipset team in Bangalore
  • 5+ years’ experience with embedded Operating Systems, Linux kernel, and/or Linux drivers
  • Experience with CPU and IO virtualization
  • Experience with the networking stack, storage drivers, file systems, microkernels, hypervisors, firmware
  • Experience with I/O interfaces like I2C, GPIO, SPI, UART, etc.
  • Experience with embedded processors and assembly language programming (ARM, MIPS, or PowerPC)

21) ASIC Design – Senior Staff Engineer -for World Leaders in Communication space in Bangalore
  • Strong fundamentals and proven expertise in digital logic design
  • Strong fundamentals in CPU architecture, SoC Systems and SoC development flow & CMOS logic fundamentals
  • Knowledge in Lint, CDC, timing constraints, synthesis, STA, power analysis
  • Experience in Digital Signal Processing, Communications systems, Networking or Power systems
  • BS in Electrical Engineering or related + 10 years of experience, or MS with 8+ years

22) CPU Verification Engineer -for RISC-V Architecture based New CPU Team in Bangalore
  • Ideal candidate should have 4+yrs of experience and strong understanding of CPU Verification fundamentals
  • Experience in complex coverage driven Verification, System Verilog and UVM methodology

23) Compiler Backend Software (LLVM ) – Principal / Sr. Staff / Staff/ Sr Engineer – for next generation AI Accelerator Products Team in Bangalore
  • Develop effective representations of novel architectural features in LLVM IR
  • Design and implement LLVM IR and backend optimizations, maximizing performance on deep learning and HPC workloads
  • Maintain our production compiler in use by customers in both the ML and HPC domains
  • Bachelor’s or foreign equivalents in computer science, engineering, or related field
  • 0 – 20+ years of experience developing optimizing compilers using the LLVM tool chain
  • Strong C++ development skills

24) Physical Design Engineer -for World’s First Wireless 5G AI/ ML Chipsets in Bangalore
  • Good understanding of the RTL2GDSII concepts related to synthesis, place & route, CTS, timing convergence, layout closure
  • Good knowledge and experience in Block-level and Sub-system Floor-planning and Physical verification
  • Experience with tools like Innovus/ICC2, Tempus/Primetime/etc used in the RTL2GDSII implementation
  • Well versed with timing constraints, STA, and timing closure
  • Good automation skills in PERL, TCL, tool specific scripting on one of the industry leading Place & Route tools

25) ASIC Design Engineer- for the Next Generation Data-Centre Chipset team in Bangalore
  • 5+ years of RTL design and/or architecture experience.
  • In depth understanding of networking and system interface protocols and architectures.
  • Experience with high performance (low latency, high bandwidth) design techniques
  • Understanding of low power microarchitecture techniques
  • Strong knowledge of Verilog, System Verilog, Synthesis and Static Timing Analysis

26) Automotive Functional Safety Engineer -for RISC-V Architecture based New CPU Team in Bangalore.
  • Hands on experience working with ISO 26262 Functional Safety standard
  • Master’s degree in Electrical or Computer Engineering with 8+ years of industry experience
  • Minimum 3 years of experience architecting, designing, or validating ISO 26262 certified automotive functional safety systems
  • Build and champion the safety culture while guiding the design and SW teams to develop the products efficiently as per ISO26262 specifications.
  • Develop functional safety requirements, safety plan and perform safety analysis – FTA, FMEA, FMEDA and HARA etc

27) ASIC Design– High Speed Serial Links – Sr Staff / Staff Engineer for World Leaders in CE Space in Bangalore
  • Strong experience of micro architecting and design of a complex high speed SerDes , Retimers etc
  • In Depth Protocol knowledge of USB, Display port is a must
  • Defining the Arch for the Phy Block and Micro Arch of blocks like transmitter Equalization, CTLE, Elastic Buffers, High Speed Aggregators and Dis Aggregators Modeling of Signal Processing blocks
  • Worked Extensively in Physical Layer RTL IP Development
  • BE / ME with 7+yrs of experience

28) ML Engineer- Test Automation for next generation NEW AI Accelerator Products Team in Hyderabad
  • Bachelor’s / Master’s degree in Computer Science or EE with 2+ years of industry experience
  • Experience in developing automated tests for compute/machine learning or networking or storage systems within a large-scale enterprise environment
  • Strong knowledge of software system design, C++ and Python

29) Senior Director of ASIC Engineering – for World Leaders in Communication space in Chennai
  • Lead chip development efforts which include design, verification, validation and physical design of Wireless complex SOC
  • MS or PhD degree in Electronics Engineering or Electrical Engineering
  • Experience in building and leading a remote site for the US-based company, defining the team mission, and facilitating close collaboration with other sites
  • 20 years of relevant experience in Low power SOC ASIC development from concept to production.
  • Should have experience both as a technical lead as well as a development manager.

30) Principal Verification Engineer: Mixed Signal Chips- for World Leaders in CE Space in Bangalore
  • Strong Domain Knowledge in USB, High Speed Interfaces, Retimers , Signal Conditioning.
  • 12+ years of Experience with a proven track record of successful tape outs .
  • Create top level testbench to generate directed and constrained random tests in a UVM framework.
  • Strong experience in Assertions, Functional Coverage, Code Coverage, Gate Level Sims.

31) STA Lead – for World’s First Wireless 5G AI/ ML Chipsets in Bangalore
  • Strong understanding in the RTL2GDSII flow or design implementation in leading process technologies.
  • Hands-on experience on SOC & Block Level timing signoff with 4+ tape outs.
  • Strong understanding of margins/derates.
  • Good Experience in Multimode Multi corner signoff closure.
  • Strong Knowledge on IO Budgeting for blocks and creating Top-level and Block-level Clock Tree Targets.
  • Strong TCL Scripting skills are required.

32) Principal Design Engineer – Compute Subsystem for World Leaders in CE Space in Bangalore
  • Hands on experience in building subsystems around ARM Cortex and DSP Cores
  • 10+ years’ experience in CPU Subsystem Design with a leading chip company
  • Strong knowledge of busses like AXI, AHB, APB
  • In depth understanding of Low Power arch choices and implementation techniques
  • Knowledge of standard peripherals like I2S, SPI DMA etc.

33) Physical Design – Sr. Staff / Staff Engineer – for RISC-V Architecture based New CPU Team in Bangalore.
  • The ideal candidate should come with strong Physical Design background who has experience with large, complex SOC digital PD with complete expertise from RTL 2 GDS II implementation.
  • 8+ years of experience in Physical Design

34) . Functional SoC Verification- Sr. Principal / Lead / Sr Engineer – for World Leaders in CE Space in Bangalore
  • Experience with System Verilog/UVM for IP/Subsystem and SOC development environment.
  • Execution experience on Emulation/FPGA models will be an added advantage
  • Assembly programming skills
  • Scripting and Automation (Perl, TCL, Python) to continuously improve operational efficiency
  • Experience in Microcontroller and Microprocessor architecture, ARM Cores A/M/R series, Interconnect (NIC, FlexNoC), Cache Coherency.
  • Experience in protocols like AHB/AMBA, AXI, ACE, OCP, Memory (Flash, SRAM, LPDDR/DDR3/4, SD, eMMC) and memory controllers

35) Firmware Design Engineer for World’s First Wireless 5G AI/ ML Chipsets in Bangalore
  • Strong background in Wireless communication and signal processing
  • Very strong coding & debugging skills in C is must
  • Knowledge of any of the wireless technologies (4G, 5G, WLAN technologies (802.11a/b/g/n/ac/ax)) is a plus
  • Knowledge of RTOS, compilers, build and source code control tools will be a plus

36) SoC Performance Verification – Principal / Sr. Staff / Staff / Sr Engineer- for World Leaders in CE Space in Bangalore
  • Good domain knowledge expertise on ARM interconnects / Network On Chip including Cache Coherence with understanding of performance features
  • Understanding of memory subsystems, caches, DDR controllers, Flash memory controller architectures.
  • Strong Programming skills in C/C++/ Python or other languages to enable data analytics
  • Experience with HDLs like Verilog, System Verilog, SOC RTL verification, UVM methodology to execute, analyze and debug performance test cases.

37) Lead/ Sr.Software Engineer – for World’s First Wireless 5G AI/ ML Chipsets in Bangalore
  • 4 -10+ years’ experience in software development and design.
  • Expert in C/C++ programming.
  • Experience in network management concepts and protocols (TCP/IP, CLI, NETCONF/YANG, XML).
  • Experience in FCAPS module. (Performance Management, Fault Management, Configuration Management

38) . ASIC Verification – Senior Staff Engineer – for World Leaders in Communication space in Bangalore
  • Expert in Front End Verification using SV-UVM based test benches.
  • Should have developed SV -UVM test benches for multiple projects and must have developed SV / C based test cases
  • Should have expertise in defining Test plans for Block, IP, Sub-System , SoC verification
  • Experience with scripting languages like Perl, Python
  • Experience of working with PCIe , AXI, AHB, SERDES systems
  • BS in Electrical Engineering or related + 10 years of experience, or MS with 8+ years

39) Embedded Software Engineer for World’s First Wireless 5G AI/ ML Chipsets in Bangalore
  • Very strong coding & debugging skills in C/C++ is must.
  • Strong OS and Networking concepts.
  • Knowledge of any of the wireless technologies (4G, 5G, WLAN technologies (802.11a/b/g/n/ac/ax)) will be a big plus
  • Deep understanding of embedded software engineering principles, and core computer science fundamentals.

40) ASIC Design Engineer – for World’s First Wireless 5G AI/ ML Chipsets in Bangalore
  • Must be B.E/B.Tech or M.E/M.Tech or PhD in E&C or E&E domains with 0-2 years of experience. Strong digital logic design skills using FSMs, Boolean logic, arithmetic logic.
  • Strong basics in microelectronics, transistors, CMOS technologies

41) CPU Design Engineers – for RISC-V Architecture based New CPU Team in Bangalore
  • Ideal candidate should have strong understanding of computer architecture and 2+ yrs of experience
  • Experience on the internals of processor (Instruction Fetch Design, Branch Prediction, Memory Subsystem or Load/store design, Cache Coherency, DMA, MMU, RISC-V ISA design etc)